Roles & Responsibilities
- RTL programming (Verilog/System Verilog or VHDL).
- Knowledge of complete FPGA Design Development flow.
- Hands-on with FPGA Development Tools (Quartus, Modelsim, Vivado, Xilinx ISE, Libero, etc.).
- Functional verification using Verilog/System Verilog or VHDL.
- RTL Code Optimization to meet timings and fit on-chip resources.
- Support all phases of FPGA based product development activities.
- System Architecture Design.
- Testing and troubleshooting of hardware.
Skills Requirements
- BE/B.Tech in Electronics/Electronics & Communication from a recognized university with a good academic record.
- ME/M.Tech in Electronics/VLSI Design from a recognized university with a good academic record.
- Experience with Verilog/SystemVerilog or VHDL for design and verification.
- In-depth understanding of FPGA design flow/methodology, IP integration, and design collateral.
- Should be able to develop the small blocks of IP from scratch and do basic functional verification.
- Should be familiar with protocols like SPI, I2C, UART and AXI.
- Understanding of standard/specification/application for IP design or system design.
- Knowledge of Altera Quartus II Tool, Questasim, Modelsim.
- Knowledge of Xilinx tools like ISE, and Vivado.
- Knowledge of Microsemi tools like libero.
- Knowledge of USB, Ethernet, and external memories such as DDR, QDR RAM and QSPI-NOR based Flash.
Personal Competency
- Self-motivated to learn and contribute.
- Ability to work effectively with global teams.
- Able and willing to work in a team-oriented, collaborative environment.
- A demonstrated ability to prioritize and execute tasks so as to achieve goals in an innovative, fast-paced, and often high-pressure environment.
- Proven analytical and creative problem-solving abilities.
- Passionate about writing clean and neat code that adheres to coding guidelines.
