DDR2 SDRAM is a high-speed CMOS, dynamic random-access memory internally configured as aquad-bank/eight-bank DRAM. It uses a double-data-rate (DDR) architecture to achieve high speedoperation. The DDR2 SDRAM uses double data rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 4n-prefetch architecture, with an interface designed to transfer two data words per clock cycle at the I/O balls. A single read or write access for the DDR2 SDRAM effectively consists of a single 4n-bit-wide, one clock-cycle data transfer at the internal DRAM core and four corresponding n-bit-wide.DDR2 SDRAM Memory controller manages all the operations like Read, Write, Initialization and Refresh requirements of DDR2 memory module.